Selection reference · illustrative scenario
Receiver requirements lead the review
The host and system specification determine frequency, signaling and clock architecture. Preserve full suffixes and revisions from an existing BOM. Identical package and frequency do not establish compatibility.
Engineering: interfaces and measurement conditions
Check receiver conditions, coupling and termination for LVDS, LVPECL or HCSL. Compare phase jitter with its integration band and use consistent power, layout and measurement connections.
Procurement: retain brand and code identity
For an existing Diodes / Pericom / SaRonix-eCERA design, start with the original code. Review legacy identifiers, suffixes and documentation before confirming availability and delivery.
Scenario: two jitter values are not comparable
When two datasheets quote different fs values, first compare integration band, carrier, typical/maximum limits and test circuits. Decide on same-board validation and retain these conditions in the conclusion.
Inquiry & validation checklist
- Receiver and interface specification
- Frequency, supply and full code
- Jitter band and maximum requirement
- Termination and link validation
